Команда открывает возможности крупномасштабных преобразований Фурье для аналоговых вычислений в оперативной памяти

Преобразования Фурье - это математические вычисления, которые могут быть использованы для определения частот, составляющих сигнал, и для выявления их индивидуального вклада. Эти преобразования использовались, например, для выявления закономерностей в звуках и изображениях, начиная от постепенных изменений интенсивности и заканчивая мелкими повторяющимися мотивами или деталями.

Цифровые процессоры, вычислительные устройства, которые обрабатывают данные в виде дискретных двоичных чисел, представленных 0 и 1, обычно выполняют эти вычисления с использованием алгоритма быстрого преобразования Фурье (FFT). БПФ рекурсивно разбивает большое преобразование Фурье на более мелкие преобразования, и этот подход "разделяй и властвуй" приводит к значительному ускорению работы цифровых процессоров. Это преимущество выражается в знаменитом законе масштабирования O (N log N), который определяет соотношение времени и энергии, необходимых для вычисления масштаба преобразования Фурье, с размером преобразования (N).

Аналоговые компьютеры, которые обрабатывают данные в виде электрического напряжения или других непрерывных физических величин, традиционно не использовались для выполнения больших преобразований Фурье. Адаптация алгоритма БПФ к аналоговому компьютеру позволила бы повысить энергоэффективность, присущую этому способу вычислений, и в то же время использовать преимущество алгоритма в вычислительной сложности, которое до сих пор было доступно только цифровым процессорам.

Исследователи из Национальных лабораторий Сандии, Infineon Technologies и Университета штата Аризона недавно продемонстрировали новый подход к эффективному выполнению важнейших вычислений БПФ с помощью аналоговой системы, состоящей из большого количества компонентов памяти.

Предложенный ими метод, представленный в статье, опубликованной в журнале Nature Electronics, предполагает разделение большого преобразования Фурье на более мелкие вычисления и последующее использование электрических свойств ячеек памяти для параллельного выполнения ключевых операций на аналоговом чипе, а также выполнение других этапов в цифровом виде.

"В течение многих лет наша группа и многие другие исследователи изучали аналоговые вычисления в памяти как очень эффективный ускоритель для умножения матриц", - сказал Т. Патрик Сяо, первый автор статьи, в интервью Tech Xplore.

"Эта уникальная функция очень мощная, потому что большая часть обработки ИИ может быть сведена к умножению матриц. Но это оборудование не смогло ускорить один из самых важных и широко используемых алгоритмов во всех современных вычислениях - БПФ. Это казалось серьезным ограничением".

The FFT algorithm has become an indispensable tool for digital signal processing applications. But it was not clear at first whether the algorithm, which was designed for digital processors, could be efficiently mapped to analog in-memory computing processors.

"On one hand, we had a technology that was great at running matrix multiplications," said Xiao. "The bigger the matrix, the better, up to the point where the matrix exceeded the memory array's physical size. On the other hand, we had an algorithm—the FFT—that normally executes Fourier transforms by dividing them up, then dividing again, until they were divided into the tiniest pieces possible: the smaller the better. How do we reconcile the two?"

Xiao and his colleagues wanted to effectively bring analog computing and the FFT algorithm together. To do this, they used one of the original formulations of the FFT algorithm that breaks down each Fourier transform into two smaller transforms. Each of the resulting transforms could be broken down again to further reduce their size.

"We stopped dividing when the subproblem matched the size of the physical memory array," explained Xiao. "That is the optimal point. With this technique, a memory array of any size is now capable of computing very large FFTs. But for the best energy efficiency, we want to divide the FFT as few times as possible. That means large memory arrays are better than small arrays."

The chip on which the team ran the main Fourier transform calculations was built using SONOS flash memory. Each memory cell traps electrical charge in a thin insulating layer, which allows it to retain a value without power.

The team's chip uses these stored values to perform calculations when it is running. In the case of the FFT, the flash memory cells stored the coefficients of the discrete Fourier transform, which are complex numbers that have real and imaginary components.

"A SONOS memory is very precisely controllable, and that precision lets us scale up to a large array," said Xiao. "We used more than half a million flash devices at the same time, within the same array, to compute a matrix multiplication. There are very few memory technologies that can support that scale of array-parallel computation without the error accumulation getting out of control."

Similar analog chips were previously shown to compute Fourier transforms of up to 128 points, while the researchers' system could process 65,536 points. In the context of the team's study, a point is an input value, such as a single sample extracted from an audio recording. Xiao further adds, "Because of the way the FFT scales, it is much easier than before to scale up to even bigger Fourier transforms."

The approach developed by Xiao and his colleagues could make large transforms easier to run on analog in-memory computing chips, without requiring a proportionally large memory array. Without it, such transforms would have required such a large collection of memory arrays that the advantage of analog computing would be jeopardized.

The new approach could be advantageous for numerous real-world applications that could benefit from the ability to run FFTs efficiently, within tight budgets for chip power and area.

"These computations are often done on power-starved sensor systems that are not connected to the grid," explained Xiao.

"That power limitation currently limits both the amount and the kind of computation they can run. By adding the methods we presented to their repertoire, in-memory computing chips can now run both FFT-heavy and matrix-multiplication-heavy applications. That means both signal processing and AI workloads at low power, within the same chip."

Based on the researchers' modeling, their approach could reduce the energy needed to process signals. This would be useful for edge computing, where devices process data locally rather than waiting for a response from a data center.

Expanding on this, Christopher Bennett, the paper's last author, commented, "The ability to implement large FFTs using in-memory compute would be a huge unlock for edge sensing workloads in particular; it would allow small systems to perform workloads that were not previously possible in those settings.

"For instance, a satellite with both a standard digital processor and an analog coprocessor implementing our methods could now produce optical or radar images that are an order of magnitude higher resolution and/or scale than before.

"This could lead to new applications in remote sensing, such as wildfire detection, land change monitoring or resource exploration, as well as homeland defense. In addition, the methods could enable drones or other UAVs to do real-time sensing workloads that they are currently unable to perform, especially on long flights."

So far, the researchers have demonstrated their approach on one-dimensional audio signals and two-dimensional images. While they believe their results are promising, they view these as preliminary assessments of the hardware's viability in real applications.

"Analog in-memory computing is known to introduce a little bit of error, which we can reduce by making the devices and circuits more precise, as well as by engineering algorithmic corrections," said Xiao.

To understand how much their system's computation errors would impact performance on real problems, the researchers will need to perform further tests. As part of their next studies, they plan to test their system on complex real-world workloads that require other computations in addition to FFT algorithms.

Future studies could also assess its potential for edge computing applications based on specific sensor system details and the energy budget of a given edge platform, such as satellites and UAVs.

"The workload could involve, for example, in-sensor computing that combines FFT-based signal processing with AI algorithms," added Xiao. "So, finding or developing these workloads and using them to evaluate the technology is an important next step."

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